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- Path: postoffice.ptd.net!markgray
- From: markgray@postoffice.ptd.net (Mark T. Gray)
- Newsgroups: comp.lang.c
- Subject: Re: Is it possible to have one Makefile for several compilers?
- Date: 18 Feb 1996 17:03:55 GMT
- Organization: Entropy
- Message-ID: <4g7m5r$ih5@ns2.ptd.net>
- References: <31249363.1664@ivab.se>
- NNTP-Posting-Host: cs1-02.spa.ptd.net
-
- In article <31249363.1664@ivab.se>, Goran Wireen <Goran_Wireen@ivab.se> wrote:
- >I would like to use the same Makefile for different compilers
- >(Gnu C/C++, Unix cc, CXX). I was hoping that I easily could
- >select compiler by calling e.g:
- >
- > make gcc all
- >
- >and by using a Makefile that looks something like this:
- >
- > # Default compiler is cc
- > CC = cc
- [snip]
- >
- > all:
- > $(CC) $(CFLAGS_AND_STUFF) $(SOURCES) ...
- >
- >But as you can assign macros in the command lines below cxx: and
- >gcc: this won't work.
- >
- sure won't
-
- >Does anybody have any idea how I can select compiler in a simple
- >way?
-
- you can override variables on the command line:
-
- ie make all CC=gcc
-
-
- quoting from info for GNU make:
-
- Overriding Variables
- ====================
-
- An argument that contains = specifies the value of a variable:
- V=X sets the value of the variable V to X. If you specify a value in
- this way, all ordinary assignments of the same variable in the makefile
- are ignored; we say they have been "overridden" by the command line
- argument.
-
- (end quote)
-
- Hope this helps.
-